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|state={{{state|autocollapse}}}
|name=Intel processor roadmap
|title=Intel CPU core roadmaps from [[P6 (microarchitecture)|P6]] to Panther Lake
|list1=
<table class="wikitable" style="border:none; text-align:center;">
    <tr>
        <th colspan="2" style="background-color:var(--background-color-progressive-subtle);">[[Intel Atom|<span style="color:var(--color-progressive);">Atom (ULV)</span>]]</th>
        <td rowspan="39" style="border:none; background-color:var(--background-color-base);"></td>
        <th rowspan="2">Node name</th>
        <td rowspan="39" style="border:none; background-color:var(--background-color-base);"></td>
        <th colspan="2" style="background-color:var(--background-color-progressive-subtle); color:var(--color-base);">[[Pentium|<span style="color:var(--color-progressive);">Pentium</span>]]/[[Intel Core|<span style="color:var(--color-progressive);">Core</span>]]</th>
        <td rowspan="39" style="border:none; background-color:var(--background-color-base);"></td>
        <td colspan="5" rowspan="7" style="border:none; background-color:var(--background-color-base);"></td>
    </tr>
    <tr>
        <th style="background-color:var(--background-color-progressive-subtle);">[[Microarchitecture|<span style="color:var(--color-progressive);">Microarch.</span>]]</th>
        <th style="background-color:var(--background-color-progressive-subtle); color:var(--color-base);">Step</th>
        <th style="background-color:var(--background-color-progressive-subtle);">[[Microarchitecture|<span style="color:var(--color-progressive);">Microarch.</span>]]</th>
        <th style="background-color:var(--background-color-progressive-subtle); color:var(--color-base);">Step</th>
    </tr>
    <tr>
        <td colspan="2" rowspan="13"></td>
        <th>[[600 nm process|600 nm]]</th>
        <td rowspan="8"><b>[[P6 (microarchitecture)|P6]]</b></td>
        <td>[[Pentium Pro]]<br>(133 MHz)</td>
    </tr>
    <tr>
        <th>[[600 nm process|500 nm]]</th>
        <td>[[Pentium Pro]]<br>(150 MHz)</td>
    </tr>
    <tr>
        <th rowspan="2">[[350 nm process|350 nm]]</th>
        <td>[[Pentium Pro]]<br>(166–200 MHz)</td>
    </tr>
    <tr>
        <td>[[Klamath (microprocessor)|Klamath]]</td>
    </tr>
    <tr>
        <th rowspan="2">[[250 nm process|250 nm]]</th>
        <td>[[Deschutes (microprocessor)|Deschutes]]</td>
    </tr>
    <tr>
        <td>[[Katmai (microprocessor)|Katmai]]</td>
        <th style="background-color:var(--background-color-progressive-subtle);">[[NetBurst|<span style="color:var(--color-progressive);">NetBurst</span>]]</th>
        <td colspan="4" rowspan="3" style="border:none; background-color:var(--background-color-base);"></td>
    </tr>
    <tr>
        <th>[[180 nm process|180 nm]]</th>
        <td>[[Coppermine (microprocessor)|Coppermine]]</td>
        <td>[[Pentium 4#Willamette|Willamette]]</td>
    </tr>
    <tr>
        <th rowspan="2">[[130 nm process|130 nm]]</th>
        <td>[[Tualatin (microprocessor)|Tualatin]]</td>
        <td rowspan="2">[[Pentium 4#Northwood|Northwood]]</td>
    </tr>
    <tr>
        <td rowspan="4">'''Pentium M'''</td>
        <td>[[Banias (microprocessor)|Banias]]</td>
        <td style="border:none; background-color:var(--background-color-base);"></td>
        <th style="background-color:var(--background-color-progressive-subtle);">[[Hyper-threading|<span style="color:var(--color-progressive);">NetBurst(HT)</span>]]</th>
        <td style="border:none; background-color:var(--background-color-base);"></td>
        <th style="background-color:var(--background-color-progressive-subtle); color:var(--color-base);">NetBurst([[Multi-core processor|<span style="color:var(--color-progressive);">×2</span>]])</th>
    </tr>
    <tr>
        <th rowspan="2">[[90 nm process|90 nm]]</th>
        <td rowspan="2">[[Dothan (microprocessor)|Dothan]]</td>
        <td>[[Pentium 4#Prescott|Prescott]]</td>
        <td style="border:none; background-color:var(--background-color-base); color:var(--color-base);">⇨</td>
        <td>[[Pentium 4#Prescott 2M (Extreme Edition)|Prescott‑2M]]</td>
        <td style="border:none; background-color:var(--background-color-base); color:var(--color-base);">⇨</td>
        <td>[[Smithfield (microprocessor)|Smithfield]]</td>
    </tr>
    <tr>
        <td><s>[[Tejas and Jayhawk|Tejas]]</s></td>
        <td style="border:none; background-color:var(--background-color-base); color:var(--color-base);">→</td>
        <td>⇩</td>
        <td style="border:none; background-color:var(--background-color-base); color:var(--color-base);">→</td>
        <td><s>[[Tejas and Jayhawk#Design and microarchitecture|Cedarmill (Tejas)]]</s></td>
    </tr>
    <tr>
        <th rowspan="2">[[65 nm process|65 nm]]</th>
        <td>[[Yonah (microprocessor)|Yonah]]</td>
        <td><s>[[NetBurst#Successor|Nehalem (NetBurst)]]</s></td>
        <td style="border:none; background-color:var(--background-color-base);"></td>
        <td>[[Pentium 4#Cedar Mill|Cedar Mill]]</td>
        <td style="border:none; background-color:var(--background-color-base); color:var(--color-base);">⇨</td>
        <td>[[Presler (microprocessor)|Presler]]</td>
    </tr>
    <tr>
        <td rowspan="2"><b>Core</b></td>
        <td>[[Intel Core (microarchitecture)|Merom]]</td>
        <td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">4 cores on mainstream desktop, [[DDR3]] introduced</td>
    </tr>
    <tr>
        <td rowspan="4"><b>Bonnell</b></td>
        <td rowspan="2">[[Bonnell (microarchitecture)|Bonnell]]</td>
        <th rowspan="2">[[45 nm process|45 nm]]</th>
        <td>[[Penryn (microarchitecture)|Penryn]]</td>
        <td colspan="5" style="border:none; background-color:var(--background-color-base);"></td>
    </tr>
    <tr>
        <td rowspan="2"><b>Nehalem</b></td>
        <td>[[Nehalem (microarchitecture)|Nehalem]]</td>
        <td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">[[Hyper-threading|HT]] reintroduced, integrated [[Memory controller|MC]], PCH<br>L3-cache introduced, 256KB L2-cache/core</td>
    </tr>
    <tr>
        <td rowspan="2">[[Saltwell (microarchitecture)|Saltwell]]</td>
        <th rowspan="2">[[32 nm process|32 nm]]</th>
        <td>[[Westmere (microarchitecture)|Westmere]]</td>
        <td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">Introduced GPU on same package and [[AES-NI|AES-NI]]</td>
    </tr>
    <tr>
        <td rowspan="2"><b>Sandy Bridge</b></td>
        <td>[[Sandy Bridge]]</td>
        <td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">On-die ring bus, no more non-[[UEFI]] motherboards</td>
    </tr>
    <tr>
        <td rowspan="4"><b>Silvermont</b></td>
        <td rowspan="2">[[Silvermont]]</td>
        <th rowspan="2">[[22 nm process|22 nm]]</th>
        <td>[[Ivy Bridge (microarchitecture)|Ivy Bridge]]</td>
        <td colspan="5" style="border:none; background-color:var(--background-color-base);"></td>
    </tr>
    <tr>
        <td rowspan="2"><b>Haswell</b></td>
        <td>[[Haswell (microarchitecture)|Haswell]]</td>
        <td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">Fully integrated voltage regulator</td>
    </tr>
    <tr>
        <td rowspan="2">[[Airmont (microarchitecture)|Airmont]]</td>
        <th rowspan="9">[[14 nm process|14 nm]]</th>
        <td>[[Broadwell (microarchitecture)|Broadwell]]</td>
        <td colspan="5" style="border:none; background-color:var(--background-color-base);"></td>
    </tr>
    <tr>
        <td rowspan="7"><b>Skylake</b></td>
        <td>[[Skylake (microarchitecture)|Skylake]]</td>
        <td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">[[DDR4]] introduced on mainstream desktop</td>
    </tr>
    <tr>
        <td rowspan="3"><b>Goldmont</b></td>
        <td rowspan="3">[[Goldmont]]</td>
        <td>[[Kaby Lake]]</td>
        <td colspan="5" style="border:none; background-color:var(--background-color-base);"></td>
    </tr>
    <tr>
        <td>[[Coffee Lake]]</td>
        <td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">6 cores on mainstream desktop</td>
    </tr>
    <tr>
        <td>[[Kaby Lake#Amber Lake|Amber Lake]]</td>
        <td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">Mobile-only</td>
    </tr>
    <tr>
        <td rowspan="4"><b>Goldmont Plus</b></td>
        <td rowspan="4">[[Goldmont Plus]]</td>
        <td>[[Whiskey Lake]]</td>
        <td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">Mobile-only</td>
    </tr>
    <tr>
        <td>[[Coffee Lake]] Refresh</td>
        <td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">8 cores on mainstream desktop</td>
    </tr>
    <tr>
        <td>[[Comet Lake (microprocessor)|Comet Lake]]</td>
        <td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">10 cores on mainstream desktop</td>
    </tr>
    <tr>
        <td><b>Sunny Cove</b></td>
        <td>[[Sunny_Cove_(microarchitecture)#Cypress_Cove|Cypress Cove]] ([[Rocket Lake]])</td>
        <td colspan="5" style="border:none; background-color:var(--background-color-base); text-align:left; color:var(--color-base);">Backported Sunny Cove microarchitecture for 14nm</td>
    </tr>
    <tr>
        <td rowspan="3"><b>Tremont</b></td>
        <td rowspan="3">[[Tremont (microarchitecture)|Tremont]]</td>
        <th rowspan="3">[[10 nm process|10 nm]]</th>
        <td>'''Skylake'''</td>
        <td>Palm Cove ([[Cannon Lake (microarchitecture)|Cannon Lake]])</td>
        <td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">Mobile-only</td>
    </tr>
    <tr>
        <td rowspan="2"><b>Sunny Cove</b></td>
        <td>[[Sunny Cove]] ([[Ice Lake (microprocessor)|Ice Lake]])</td>
        <td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">512 KB L2-cache/core</td>
    </tr>
    <tr>
        <td>[[Willow Cove]] ([[Tiger Lake]])</td>
        <td colspan="5" style="border:none; background-color:var(--background-color-base); text-align:left; color:var(--color-base);">[[Intel Xe|X<sup>e</sup>]] graphics engine</td>
    </tr>
    <tr>
        <td rowspan="2"><b>Gracemont</b></td>
        <td rowspan="2">[[Gracemont (microarchitecture)|Gracemont]]</td>
        <th rowspan="2">[[7 nm process|Intel 7]]<br>(10nm ESF)</th>
        <td rowspan="2"><b>Golden Cove</b></td>
        <td>[[Golden Cove]] ([[Alder Lake]])</td>
        <td colspan="5" style="border:none; background-color:var(--background-color-base); text-align:left; color:var(--color-base);">Hybrid, DDR5, PCIe 5.0</td>
    </tr>
    <tr>
        <td>[[Golden Cove#Raptor Cove|Raptor Cove]] ([[Raptor Lake]])</td>
        <td colspan="5" style="border:none; background-color:var(--background-color-base);"></td>
    </tr>
    <tr>
        <td><b>Crestmont</b></td>
        <td>Crestmont</td>
        <th>[[5 nm process|Intel 4]]</th>
        <td><b>Redwood Cove</b></td>
        <td>[[Meteor Lake]]</td>
        <td colspan="5" style="border:none; background-color:var(--background-color-base); text-align:left; color:var(--color-base);">Mobile-only<br>[[Neural processing unit|NPU]], [[chiplet]] architecture</td>
    </tr>
    <tr>
        <td rowspan="2"><b>Skymont</b></td>
        <td rowspan="2">''[[Skymont]]''</td>
        <th>[[3 nm process|N3B]] ([[TSMC]])</th>
        <td rowspan="2"><b>Lion Cove</b></td>
        <td>''[[Lunar Lake]]''</td>
        <td colspan="5" style="border:none; background-color:var(--background-color-base); text-align:left; color:var(--color-base);">Low power mobile only (9-30W) </td>
    </tr>
    <tr>
        <th>[[2 nm process|20A]]</th>
        <td>''[[Arrow Lake (microprocessor)|Arrow Lake]]''</td>
        <td colspan="5" style="border:none; background-color:var(--background-color-base); text-align:left; color:var(--color-base);"></td>
    </tr>
    <tr>
        <td><b>Darkmont</b></td>
        <td>''Darkmont''</td>
        <th>18A</th>
        <td><b>Cougar Cove</b></td>
        <td>''[[Panther Lake (microprocessor)|Panther Lake]]''</td>
        <td colspan="5" style="border:none; background-color:var(--background-color-base); text-align:left; color:var(--color-base);"></td>
    </tr>
</table>
<ul style="text-align:left;">
    <li><s>Strike-through</s> indicates cancelled processors
    <li>'''Bold names''' are microarchitectures
    <li>''Italic names'' are future processors
</ul>
}}<noinclude>{{Documentation}}</noinclude>