Template:Infobox CPU

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This template is for CPUs, SoCs and SiPs. For generic hardware components, see Template:Infobox computer hardware.

{{{name}}}

[[File:{{{image}}}|{{{image_size}}}|alt={{{alt}}}]] {{{caption}}}
Launching	{{{launching}}}
Launched	{{{produced-start}}}
Discontinued	{{{produced-end}}}
Marketed by	{{{soldby}}}
Designed by	{{{designfirm}}}
Common manufacturers	{{{manuf1}}} {{{manuf2}}} {{{manuf3}}} {{{manuf4}}} {{{manuf5}}} {{{manuf6}}} {{{manuf7}}} {{{manuf8}}} {{{manuf9}}} {{{manuf10}}}
CPUID code	{{{cpuid}}}
Product code	{{{code}}}
Max. CPU clock rate	{{{slowest}}} {{{slow-unit}}} to {{{fastest}}} {{{fast-unit}}}
FSB speeds	{{{fsb-slowest}}} {{{fsb-slow-unit}}} to {{{fsb-fastest}}} {{{fsb-fast-unit}}}
HyperTransport speeds	{{{hypertransport-slowest}}} {{{hypertransport-slow-unit}}} to {{{hypertransport-fastest}}} {{{hypertransport-fast-unit}}}
QPI speeds	{{{qpi-slowest}}} {{{qpi-slow-unit}}} to {{{qpi-fastest}}} {{{qpi-fast-unit}}}
DMI speeds	{{{dmi-slowest}}} {{{dmi-slow-unit}}} to {{{dmi-fastest}}} {{{dmi-fast-unit}}}
Data width	{{{data-width}}}
Address width	{{{address-width}}}
Virtual address width	{{{virtual-width}}}
L1 cache	{{{l1cache}}}
L2 cache	{{{l2cache}}}
L3 cache	{{{l3cache}}}
L4 cache	{{{l4cache}}}
Last level cache	{{{llcache}}}
Application	{{{application}}}
Technology node	{{{size-from}}} to {{{size-to}}}
Microarchitecture	{{{microarch}}}
Instruction set	{{{arch}}}
Instructions	{{{instructions}}}
Extensions	{{{extensions}}}
Number of instructions	{{{numinstructions}}}
Transistors	{{{transistors}}}
Cores	{{{numcores}}}
Memory (RAM)	{{{amountmemory}}}
GPU	{{{gpu}}}
Co-processor	{{{co-processor}}}
Packages	{{{pack1}}} {{{pack2}}} {{{pack3}}} {{{pack4}}} {{{pack5}}}
Sockets	{{{sock1}}} {{{sock2}}} {{{sock3}}} {{{sock4}}} {{{sock5}}} {{{sock6}}} {{{sock7}}} {{{sock8}}} {{{sock9}}}
Core names	{{{core1}}} {{{core2}}} {{{core3}}} {{{core4}}} {{{core5}}} {{{core6}}} {{{core7}}} {{{core8}}} {{{core9}}}
Product code names	{{{pcode1}}} {{{pcode2}}} {{{pcode3}}} {{{pcode4}}} {{{pcode5}}} {{{pcode6}}} {{{pcode7}}} {{{pcode8}}} {{{pcode9}}}
Models	{{{model1}}} {{{model2}}} {{{model3}}} {{{model4}}} {{{model5}}} {{{model6}}} {{{model7}}} {{{model8}}} {{{model9}}}
Brand names	{{{brand1}}} {{{brand2}}} {{{brand3}}} {{{brand4}}} {{{brand5}}} {{{brand6}}} {{{brand7}}} {{{brand8}}} {{{brand9}}}
Variant	{{{variant}}}
Predecessor	{{{predecessor}}}
Successor	{{{successor}}}
{{{support status}}}

<syntaxhighlight lang="wikitext" style="overflow: auto;"> </syntaxhighlight>

Usage

<syntaxhighlight lang="wikitext" style="overflow: auto;"> </syntaxhighlight>

• All fields, except name are optional
• The following parameters are deprecated:

created	→better: produced-start, produced-end
clock	→better: slowest, fastest
fsb	→better: fsb-slowest, fsb-fastest
cores, cores1	→better: numcores
socket	→better: sock1...sock9

• manuf, core, sock, pack, arch, and microarch are AutoLinks, so you can use plain text or a link for them.
• The numbered attributes mean that there is allowance for multiples.
• See the talk page for some examples which show the full usage of this infobox in a few combinations.

Examples

• Haswell (microarchitecture)
• Pentium III
• Intel 80386

See also

• {{Infobox CPU architecture}}
• {{Infobox computer hardware}}

The above documentation is transcluded from Template:Infobox CPU/doc. (edit | history)
Editors can experiment in this template's sandbox (edit | diff) and testcases (edit) pages.
Add categories to the /doc subpage. Subpages of this template.