File:Intel 8086 block scheme.svg

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Summary
DescriptionIntel 8086 block scheme.svg |
English: Block diagram of the Intel 8086 microprocessor 1. Block of general purpose registers, 2 Block segment registers, 3 20 BIT combiner, 4 Internal bus C, 5 Queue commands, 6 The control system, 7 The control system bus, 8 Internal Bus A, 9 Arithmetic logic unit (ALU), 10 Address bus, 11 Data bus, 12 Rail Control F. Registry tags, AX -accumulator , BX - register base CX - counting register, DX - data register, SP - stack pointer, BP - base pointer, SI - source index, DI - Destination Index ,CS - code Segment DS - data segment, SS - stack segment, ES - extra segment, IP - Instruction Pointer.
Français : Diagramme des blocs du microprocesseur Intel 8086 :
Polski: Schemat blokowy mikroprocesora Intel 8086. 1. Blok rejestrów ogólnego przeznaczenia, 2. Blok rejestrów segmentowych, 3. Dwudziestobitowy sumator, 4. Magistrala wewnętrzna C, 5. Kolejka rozkazów, 6. Układ sterowania, 7. Układ sterowania magistral, 8. Magistrala wewnętrzna A, 9. Jednostka Arytmetyczno-Logiczna (ALU), 10. Szyna adresowa, 11. Szyna danych, 12. Szyna sterowania, F. Rejestr znaczników, AX - akumulator, BX - rejestr bazowy, CX - rejestr zliczający, DX - rejestr danych, SP - wskaźnik stosu, BP - wskaźnik bazowy, SI - indeks źródła, DI - indeks celu, CS - segment kodu, DS - segment danych, SS - segment stosu, ES - segment dodatkowy, IP - wskaźnik rozkazów |
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Date | |||
Source | Własne opracowanie na podstawie różnych źródeł | ||
Author | Harkonnen2 |
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24 June 2006
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Date/Time | Thumbnail | Dimensions | User | Comment | |
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current | 22:18, 24 June 2007 | ![]() | 800 × 650 (40 KB) | wikimediacommons>Harkonnen2 | {{Information |Description=Schemat blokowy mikroprocesora Intel 8086. 1. Blok rejestrów roboczych, 2. Blok rejestrów segmentowych, 3. Dwudziestobitowy sumator, 4. Magistrala wewnętrzna C, 5. Kolejka rozkazów, 6. Układ sterowania, 7. Układ sterowania |
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