Template:Infobox CPU series
[[File:{{{image}}}|frameless|alt={{{alt}}}]] {{{caption}}} | |
Launching | {{{launching}}} |
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Launched | {{{launched}}} |
Discontinued | {{{discontinued}}} |
Designed by | {{{designedby}}} |
Manufactured by |
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Fabrication process |
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Codename(s) |
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Platform(s) |
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Branding | |
Brand name(s) | {{{branding}}} |
Generation | {{{generation}}} |
Socket(s) |
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Instructions & Architecture | |
Instructions set | {{{instructions-set}}} |
Instructions | {{{instructions}}} |
Extensions |
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Core architecture | {{{core-arch}}} |
P-core architecture | {{{p-core-arch}}} |
E-core architecture | {{{e-core-arch}}} |
Cores | |
CCD codename | {{{ccd-codename}}} |
Core count | Up to {{{core-count}}} |
Peak core clock | Up to {{{peak-clock}}} {{{peakclock-unit}}} |
L1 cache | {{{l1-cache}}} |
L2 cache | {{{l2-cache}}} |
L3 cache | {{{l3-cache}}} |
P-core L0 cache | {{{p-l0-cache}}} |
P-core L1 cache | {{{p-l1-cache}}} |
E-core L1 cache | {{{e-l1-cache}}} |
P-core L2 cache | {{{p-l2-cache}}} |
E-core L2 cache | {{{e-l2-cache}}} |
P-core L3 cache | {{{p-l3-cache}}} |
E-core L3 cache | {{{e-l3-cache}}} |
Graphics | |
Graphics architecture | {{{graphics-arch}}} |
Model(s) |
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Compute Units | Up to {{{cu-count}}} CUs |
Execution Units | Up to {{{eu-count}}} EUs |
Xe Cores | Up to {{{xe-count}}} Xe Cores |
Peak graphics clock | {{{graphics-clock}}} {{{graphics-clockunit}}} |
NPU | |
Architecture | {{{npu-arch}}} |
TOPS | {{{npu-tops}}} |
Clock speed | {{{npu-clock}}} {{{npu-clockunit}}} |
Memory Support | |
Type | {{{memory-type}}} |
Memory channels | {{{memory-channels}}} |
Maximum capacity | {{{amountmemory}}} |
I/O | |
PCIe support | {{{pcie-support}}} |
PCIe lanes | {{{pcie-lanes}}} |
CXL support | {{{cxl-support}}} |
UPI links | {{{upi-links}}} |
DMI version | {{{dmi-version}}} |
HyperTransport version | {{{ht-version}}} |
History | |
Predecessor | {{{predecessor}}} |
Variant | {{{variant}}} |
Successor | {{{successor}}} |
Usage
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Examples
Ryzen 7000 Series
![]() AMD Ryzen 9 7900X processor | |
Launched | September 27, 2022 |
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Designed by | AMD |
Manufactured by | |
Fabrication process | |
Codename(s) |
|
Platform(s) |
|
Branding | |
Brand name(s) | Ryzen |
Socket(s) | |
Instructions & Architecture | |
Instructions set | x86 |
Instructions | |
Core architecture | Zen 4 |
Cores | |
Core codename | Persephone |
CCD codename | Durango |
Core count | Up to Up to 16 cores |
Peak core clock | Up to Up to 5.7 GHz |
L1 cache | 64 KB (per core):
|
L2 cache | 1 MB (per core) |
L3 cache | 32 MB (per CCD) |
Graphics | |
Graphics architecture | RDNA 2 |
Model(s) |
|
Compute Units | Up to 2 CUs |
Peak graphics clock | Up to 2100 MHz |
Memory Support | |
Memory channels | 2 channels |
I/O | |
PCIe support | PCIe 5.0 |
History | |
Predecessor | Ryzen 6000 series |
Successor | Ryzen 8000 series |
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![]() AMD Ryzen 9 7900X processor | |
Launched | September 27, 2022 |
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Designed by | AMD |
Manufactured by | |
Fabrication process | |
Codename(s) |
|
Platform(s) |
|
Branding | |
Brand name(s) | Ryzen |
Socket(s) | |
Instructions & Architecture | |
Instructions set | x86 |
Instructions | |
Core architecture | Zen 4 |
Cores | |
Core codename | Persephone |
CCD codename | Durango |
Core count | Up to Up to 16 cores |
Peak core clock | Up to Up to 5.7 GHz |
L1 cache | 64 KB (per core):
|
L2 cache | 1 MB (per core) |
L3 cache | 32 MB (per CCD) |
Graphics | |
Graphics architecture | RDNA 2 |
Model(s) |
|
Compute Units | Up to 2 CUs |
Peak graphics clock | Up to 2100 MHz |
Memory Support | |
Memory channels | 2 channels |
I/O | |
PCIe support | PCIe 5.0 |
History | |
Predecessor | Ryzen 6000 series |
Successor | Ryzen 8000 series |
</syntaxhighlight>
Alder Lake
![]() Intel Core i7-12700KF | |
Launched | November 4, 2021 |
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Designed by | Intel |
Manufactured by | |
Fabrication process | |
Codename(s) |
|
Platform(s) |
|
Branding | |
Brand name(s) | |
Generation | 12th Generation |
Socket(s) |
|
Instructions & Architecture | |
Instructions set | x86 |
Instructions | x86-64 |
Extensions | |
P-core architecture | Golden Cove |
E-core architecture | Gracemont |
Cores | |
Core count | Up to 16 cores:
|
Peak core clock | Up to Up to 5.5 GHz |
P-core L1 cache | 80 KB (per core):
|
E-core L1 cache | 96 KB (per core):
|
P-core L2 cache | 2 MB (per core) |
E-core L2 cache | 2 MB (per cluster) |
P-core L3 cache | 3 MB (per core) |
E-core L3 cache | 3 MB (per cluster) |
Graphics | |
Graphics architecture | Iris Xe |
Model(s) |
|
Execution Units | Up to 96 EUs |
Peak graphics clock | Up to 1550 MHz |
Memory Support | |
Type | DDR4-3200 DDR5-4800 |
Memory channels | 2 channels |
Maximum capacity | 256 GB |
I/O | |
PCIe support | PCIe 5.0 |
PCIe lanes | 16 PCIe 5.0 lanes 4 PCIe 4.0 lanes |
History | |
Predecessor | Rocket Lake |
Successor | Raptor Lake |
<syntaxhighlight lang="wikitext">
![]() Intel Core i7-12700KF | |
Launched | November 4, 2021 |
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Designed by | Intel |
Manufactured by | |
Fabrication process | |
Codename(s) |
|
Platform(s) |
|
Branding | |
Brand name(s) | |
Generation | 12th Generation |
Socket(s) |
|
Instructions & Architecture | |
Instructions set | x86 |
Instructions | x86-64 |
Extensions | |
P-core architecture | Golden Cove |
E-core architecture | Gracemont |
Cores | |
Core count | Up to 16 cores:
|
Peak core clock | Up to Up to 5.5 GHz |
P-core L1 cache | 80 KB (per core):
|
E-core L1 cache | 96 KB (per core):
|
P-core L2 cache | 2 MB (per core) |
E-core L2 cache | 2 MB (per cluster) |
P-core L3 cache | 3 MB (per core) |
E-core L3 cache | 3 MB (per cluster) |
Graphics | |
Graphics architecture | Iris Xe |
Model(s) |
|
Execution Units | Up to 96 EUs |
Peak graphics clock | Up to 1550 MHz |
Memory Support | |
Type | DDR4-3200 DDR5-4800 |
Memory channels | 2 channels |
Maximum capacity | 256 GB |
I/O | |
PCIe support | PCIe 5.0 |
PCIe lanes | 16 PCIe 5.0 lanes 4 PCIe 4.0 lanes |
History | |
Predecessor | Rocket Lake |
Successor | Raptor Lake |
</syntaxhighlight>
EPYC 9004 Series
Launched | November 10, 2022 |
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Designed by | AMD |
Manufactured by | |
Fabrication process | |
Codename(s) |
|
Platform(s) |
|
Branding | |
Brand name(s) | EPYC |
Generation | 4th Generation |
Socket(s) | |
Instructions & Architecture | |
Instructions set | x86 |
Instructions | |
Core architecture | Zen 4 Zen 4c |
Cores | |
CCD codename | Durango |
Core count | Up to Up to:
|
L1 cache | 64 KB (per core):
|
L2 cache | 1 MB (per core) |
L3 cache | 32 MB (per CCD) |
Memory Support | |
Type | DDR5-4800 |
Memory channels | 12 channels |
Maximum capacity | Up to 6 TB (per socket) |
I/O | |
PCIe support | PCIe 5.0 |
PCIe lanes | 128 PCIe 5.0 lanes 12 PCIe 3.0 lanes |
CXL support | CXL 1.1+ Type 3 |
History | |
Predecessor | EPYC 7003 ("Milan") |
Variant | EPYC 8004 ("Siena") |
Successor | EPYC 9005 ("Turin") |
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Launched | November 10, 2022 |
---|---|
Designed by | AMD |
Manufactured by | |
Fabrication process | |
Codename(s) |
|
Platform(s) |
|
Branding | |
Brand name(s) | EPYC |
Generation | 4th Generation |
Socket(s) | |
Instructions & Architecture | |
Instructions set | x86 |
Instructions | |
Core architecture | Zen 4 Zen 4c |
Cores | |
CCD codename | Durango |
Core count | Up to :
|
L1 cache | 64 KB (per core):
|
L2 cache | 1 MB (per core) |
L3 cache | 32 MB (per CCD) |
Memory Support | |
Type | DDR5-4800 |
Memory channels | 12 channels |
Maximum capacity | Up to 6 TB (per socket) |
I/O | |
PCIe support | PCIe 5.0 |
PCIe lanes | 128 PCIe 5.0 lanes 12 PCIe 3.0 lanes |
CXL support | CXL 1.1+ Type 3 |
History | |
Predecessor | EPYC 7003 ("Milan") |
Variant | EPYC 8004 ("Siena") |
Successor | EPYC 9005 ("Turin") |
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